Attempts have been made to realize a power saving processor by utilizing a magnetic random access memory (MRAM) as a cache memory. However, compared to a static random access memory (SRAM) as a conventional cache memory, the MRAM is slow in operation speed. Therefore, a cell configuration for realizing high-speed operation is now being developed.
Further, in processors for use in, for example, mobile products, remarkable enhancement in functionality has been recently made in addition to power saving. Because of this, different types of functionality or performance are required for different applications.